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Santa Jose, Calif. — May 8, 2003 — Anasift Technology
Inc., the inventor of Symbolic-Based Optimization (SBO) today
announced that they are entering high performance op amp optimization
and synthesis market with products based on Symbolic Based Optimization.
Dr. J.J. Hsu founded the company in 1998. His vision is that
analog optimization can be done more efficiently and accurately
at the symbolic level. Existing optimization approaches such as
simplifying and linearizing the transistor models or using parameterized
compilers don’t result in high performance analog. Anasift’s
focus is on generating and optimizing SPICE netlists and fitting
into existing design flows.
Anasift’s initial products are aimed at optimization and
synthesis of high performance op amps. The op amp is the basic
building block for analog design and the op amp’s performance
typically gates the performance of the overall analog design.
Anasift’s products are designed to fit into existing Cadence
(NYSE:CDN) Mentor Graphics (NASDAQ: MENT) and Synopsys (NASDAQ:
SNPS) analog design flows.
Analog circuits are typically used to interface the real world
to digital electronics. Analog performance impacts the reception
of cell phones, the range of wireless networks, the resolution
of a scanner, the resolution of a digital camera, the response
of LCD displays, the sensitivity of instruments, etc. High performance
analog is often the differentiator between similar products giving
the competitive edge to the manufacturer with the highest performance
analog. In the past, systems were partitioned into separate digital
and analog ICs where the analog IC were manufactured on integrated
circuit processes tailored to deliver the highest analog performance.
Today, with the true advent of systems on a chip, the analog portion
of the system is integrated onto the digital IC, increasing the
need for analog optimization. This is precisely the market that
Anasift is addressing.
Anasift’s first product is currently in beta test and product
details will be announced at the completion of the beta testing
period. Anasift will be exhibiting at the Design Automation Conference
(booth 1100) to be held in Anaheim from June 2 – 6, 2003.
About Anasift
Anasift Technology, a privately held innovative company located
in Silicon Valley, is developing electronic design automation
(EDA) software for analog integrated circuit (IC) design. Anasift
is privately held, with nearly $6 million in funding through venture
capital, corporate, and private investment sources. Investors
include: Cross Pacific Venture, Ascentech Venture, Faraday Corp.
of UMC Group, and individual semiconductor veterans.
Symbolic Based Optimization, and
Anasift are trademarks of Anasift Technology Inc.
All other products and trademarks are the property of their respective
holders.
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