| San Jose, Calif. — May
11, 2004 — Anasift Technology Inc., the EDA industry leader
in analog optimization, announced the release of AMPSO version
1.1. With this release, AMPSO expands its high performance optimization
capabilities to cover virtually all linear analog circuits including
operational amplifiers, analog buffers, comparators, band gap
references, voltage regulators, and other analog building blocks.
AMPSO offers the following benefits:
 Dramatic
improvements in analog productivity
Significantly
shortened design cycles
Greatly
enhanced design reuse
Simplified
process migration
Increased
manufacturing yield
Improved
analog design performance
“The powerful optimization engine of AMPSO is the best
of its kinds; it enables analog engineers to design and migrate
high performance analog ICs to new processes and design specifications
on very tight schedules,” said Dr. J.J. Hsu, founder and
President of Anasift. “While digital design automation has
made a number of advances over the last two decades, AMPSO is
really the first significant breakthrough in the analog domain.
AMPSO can absorb an analog designer’s expert knowledge and
use it to guide the optimization process while handling far more
corners and constraints than a human is capable of. It provides
at least 10x productivity gain and improves manufacture yield.
AMPSO is becoming a standard tool in cutting-edge analog design
flow”.
AMPSO’s productivity claims results from AMPSO’s
automated optimization behavior, proprietary algorithms, and its
ability to find solutions that are very difficult or too complex
for manual approaches to achieve. In one recent benchmark case,
AMPSO reduced design time from three weeks to less than two days
for an operational amplifier used in a 12 bit, 50 mega samples
per second analog-to-digital data converter. Inputs to AMPSO include
SPICE netlists, model libraries, design specs, and optimization
corners. AMPSO optimizes and sizes circuits to meet design specifications
across all optimization corners. It outputs optimized designs
in a spice netlist format for integration to existing Cadence
(NYSE:CDN), Mentor Graphics (NASDAQ: MENT), and Synopsys (NASDAQ:
SNPS) analog design flows.
Analog integrated circuits are typically used to handle real
world data or as part of an interface to digital electronics.
Applications include wireless LANs, high-speed networking, cellular
phones, signal processing devices, DVDs, LCD display controllers,
and other applications that demand fast design turn around.
AMPSO 1.1 is available for evaluation. Anasift will be exhibiting
at the Design Automation Conference (booth 1036) to be held in
San Diego from June 7 - 10, 2004. Product information and DAC
suite demo arrangements are available by emailing Robert Grant
at rgrant@anasift.com.
About Anasift
Anasift Technology, a privately held innovative company located
in Silicon Valley, is developing electronic design automation
(EDA) software for analog integrated circuit (IC) design. Anasift
is privately held, with nearly $6 million in funding from venture
capital, corporate and private investment sources. Investors include:
Cross Pacific Venture, Ascentech Venture, and individual semiconductor
veterans.
Contact
Anasift Technology Inc.: Robert Grant, (408) 944-9920 x 111, rgrant@anasift.com
Symbolic Based Optimization, and
Anasift are trademarks of Anasift Technology Inc.
All other products and trademarks are the property of their respective
holders.
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