| San Jose, Calif. — December
8, 2004— Anasift Technology Inc., the EDA industry leader
in analog optimization, released AMPSO beta version 2 for beta
testing. AMPSO is a designer-driven high performance analog optimization
tool. AMPSO can virtually optimize all analog amplification building
blocks and other digital cells including OPAMP, analog buffers,
comparators, band gap reference, voltage regulators, flip-flop,
etc. This release is derived from former alpha release and is
tried in the formal production line by some leading analog and
mixed signal IC design companies such as MediaTek, RealTek, RealCom,
Faraday, LSI logic, Faraday, UMC, etc. AMPSO is seamlessly integrated
into IC company's current analog design flow.
“This release will dramatically improve the analog/mixed
signal design quality and reduce time to market.” said Dr.
J.J. Hsu, founder and President of Anasift. “With the powerful
optimization engine of AMPSO, it will enable analog engineers
to speed up designing and migrating high performance analog ICs
to new processes and design specifications within very tight schedules.
With this release, the turn-around time for regular high performance
analog design will effectively reduce from months/weeks to couple
of days. It has been tested intensively by the state-of-the-art
analog design companies. We believe that AMPSO is becoming a standard
and necessary tool in cutting-edge analog design flow just as
Logic Synthesis in digital domain decades ago”.
The productivity improvement from AMPSO is resulting from AMPSO’s
automated optimization behavior, proprietary algorithms, and its
ability to find solutions that are very difficult or too complex
for manual approaches to achieve. It outputs optimized designs
in a spice netlist format for integration to existing Cadence
(NYSE:CDN), Mentor Graphics (NASDAQ: MENT), and Synopsys (NASDAQ:
SNPS) analog design flows.
About Anasift
Anasift Technology, a privately held innovative company located
in Silicon Valley, is developing electronic design automation
(EDA) software for analog integrated circuit (IC) design. Anasift
is privately held, with funding from venture capital, corporate
and private investment sources. Investors include: Cross Pacific
Venture, Ascentech Venture, and individual semiconductor veterans.
Contact
Anasift Technology Inc.: Kurt Hsieh, (408) 944-9920 x 116, kurt@anasift.com
Symbolic Based Optimization, and
Anasift are trademarks of Anasift Technology Inc.
All other products and trademarks are the property of their respective
holders.
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