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March 27, 2006
http://www.soccentral.com/results.asp?entryID=18494
March 27, 2006 -- Anasift Technology, Inc. has announced the beta
release of AMPSO-OADFM, the high-performance optimization tool
of analog design for manufacturability. Incorporating the engine
of Anasift's analog optimization tool AMPSO, AMPSO-OADFM is targeted
at transistor-level optimization of analog design for manufacturability
for all kinds of analog building blocks including opamps, analog
buffers, comparators, voltage regulators, line drivers/receivers,
and trans-impedance amplifiers, and the analog characteristics
of small digital cells.
According to Anasift, AMPSO-OADFM can optimize a high-performance
analog amplifier used in an 8-bit 205-MHz sample per second ADC
in less than one day in one regular Intel CPU yet requiring no
SPICE license.
"With AMPSO analog optimization engine embedded inside,
AMPSO-OADFM can optimize analog circuits to maintain high analog
performances, and also take care of all possible characteristic
fluctuations due to the uncertainty or variation of manufacture
process. DFM attracts much attention recently in the industry,"
said Dr. J.J. Hsu, Founder and President of Anasift. "Current
DFM topics are mostly focused on the digital ICs only. However
the facts that more than 70% of SOC designs are mixed-signal,
and analog circuits are more sensitive to process variation and
prone to produce defects of mixed-signal IC functions make people
realize that the key problem in DFM of mixed-signal SOC shall
be more in the analog part than in digital."
AMPSO-OADFM takes a SPICE netlist or AMPSO optimization file
as input. It accepts typical SPICE model files. It can optimize
analog designs to meet design specifications across statistical
variations of manufacture process corners to improve manufacturability
and to insure high yield and accurate silicon implementation.
AMPSO-OADFM is designed to fit into existing Cadence Design Systems,
Inc., Mentor Graphics Corp. and Synopsys, Inc. analog design flows.
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